1. Field of the Invention
This invention relates to a semiconductor device of chip-size package type and a manufacturing method therefore. The chip-size package (CSP) is a generic name for packages of a size equal to or slightly larger than the chip size and is a package intended for high-density packaging. The invention relates to a metal post adopted for the CSP and resin for covering the metal post.
2. Description of the Related Art
Hitherto, in the field, a structure having a plurality of solder balls arranged like a plane, called a BGA (Ball Grid Array), a structure whose outside shape is close to the chip size by making the ball pitch of the BGA narrower, called a fine-pitch BGA, any another other structure have been known.
In recent years, a wafer CSP described in the 1998 August issue of "Nikkei Microdevice" p.44-p. 71 has been available. This wafer CSP basically is a CSP comprising wiring and array-like pad manufactured in a wafer process (preprocess) before chip dicing. It is expected that the technology makes it possible to combine the wafer process and a package process (postprocess) into one for drastically reducing package costs.
The wafer CSPs are classified into those of seal resin type and those of rewiring type. The wafer CSP of the seal resin type has a structure with a surface coated with seal resin, like that of a conventional package, wherein a metal post is formed on a wiring layer on the chip surface and is surrounded by seal resin for fixture.
Generally, it is said that if a package is mounted on a printed wiring board, a stress generated because of the thermal expansion difference between the package and the printed wiring board concentrates on a metal post; however, in the wafer CSP of the seal resin type, it is considered that the stress is scattered because the metal post lengthens.
On the other hand, the wafer CSP of the rewiring type has a structure wherein rewiring is formed without using seal resin, as shown in FIG. 10. That is, an Al electrode 52, a wiring layer 53, and an insulating layer 54 are deposited on the surface of a chip 51, a metal post 55 is formed on the wiring layer 53, and a solder bump(solder ball) 56 is formed on the metal post 55. The wiring layer 53 is used as rewiring for placing the solder balls 56 in a manner of a predetermined array on the chip.
The wafer CSP of the seal resin type provides high reliability by lengthening the metal post about 100 .mu.m and reinforcing the metal post with seal resin. However, the seal resin forming process needs to be executed with a metal mold (die) in the post process and the process becomes complicated.
On the other hand, the wafer CSP of the rewiring type has the advantages that the process is comparatively simple and moreover most steps can be executed in the wafer process. However, the stress needs to be relieved for enhancing the reliability by some method.
FIG. 11 is a drawing provided by omitting the wiring layer 53 in FIG. 10. The Al electrode 52 forms an exposed opening formed with at least one layer of barrier metal 58 between the metal post 55 and the Al electrode 52, and the solder ball 56 is formed on the metal post 55.
The formation step of the insulating layer 54 sealed with resin for covering the surroundings of the metal post 55 is executed as described below.
However, in FIG. 10, the insulating layer 54 is formed of resin, thus voids are formed in the abutment part of the metal post 55.
That is, as shown in FIG. 12, resin 63 is entered in metal mold 60, 61, 62 and is pressurized and fused. Semiconductor chips 51 are placed in the metal mold in a state in which a large number of metal posts 55 are upright, and the resin 63 is pressed by the metal mold and the wafer full face is covered with the resin 63.
Numeral 64 denotes a sheet for peeling off the resin 63 from the metal mold.
However, the resin does not arrive at the edges of the surroundings of the abutment part of the metal post 55 and its lower layer and voids (black dots in the figure) are easily formed. Therefore, moisture resistance is reduced, environmental resistance worsens, or explosion occurs due to heat of external atmosphere or the element itself, destroying the element.
At the time, as shown in FIG. 13, control is performed so as to expose the head of the metal post 55 when resin sealing is executed (the sheet 64 is peeled), thus process control is complicated. That is, it is very difficult to control variations in the heights of the metal posts 55, and it is also necessary to finely control the amount of the resin 63 for sealing (containing a contraction coefficient), etc. Further, it is also necessary to consider selection of the sheet 64 for peeling off (containing elasticity).